EUV Different Speeds Up Chip Manufacturing

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Utilized Supplies has launched its new Centura Sculpta pattern-shaping system that guarantees to offer a cheap various to excessive ultraviolet (EUV) lithography double patterning used to print dense interconnect strains and vias. Because of this, the answer can cut back the variety of EUV steps, manufacturing complexity and prices whereas probably enhancing yields.

By now, all three main chipmakers—Intel, Samsung and Taiwan Semiconductor Manufacturing Co. (TSMC)—have both began to make use of EUV lithography instruments for mass manufacturing or are about to. Lithography scanners are definitely the rockstars of wafer fab tools, and EUV lithography instruments are set to be instrumental for chipmakers for years to return. However there are different instruments which might be important to constantly shrinking transistor dimensions, rising efficiency and lowering energy consumption, equivalent to Utilized Supplies’ Centura Sculpta pattern-shaping system.

Applied Materials’ Centura Sculpta.
Utilized Supplies’ Centura Sculpta (Supply: Utilized Supplies)

Centura Sculpta pattern-shaping system

To maintain advancing transistor efficiency, energy consumption and density, chipmakers should undertake extra refined course of applied sciences with tighter important dimensions. Utilization of twin EUV publicity is inevitable to print smaller options with 3-nm, 2-nm and thinner nodes. However double EUV patterning is dear, prolonged and resource-consuming.

Advantages of pattern-shaping tools at a glance.
Benefits of pattern-shaping instruments at a look (Supply: Utilized Supplies)

Utilized Supplies’ Centura Sculpta is a pattern-shaping machine that stretches the shapes patterned by an EUV scanner utilizing a particular algorithm in any chosen course throughout the X-axis to shrink the house between options and improve sample density. Elongating current shapes removes an EUV litho-etch course of loop that takes time, consumes power and supplies and prices cash.

Pattern-shaping alternative to EUV double patterning for interconnect lines.
Sample-shaping various to EUV double patterning for interconnect strains (Supply: Utilized Supplies)
Pattern-shaping alternative to EUV double patterning for vias.
Sample-shaping various to EUV double patterning for vias (Supply: Utilized Supplies)

The algorithm resembles optical proximity correction methods already used at fabs to boost decision of fab instruments. As a result of the method doesn’t contain the second masks, there are not any alignment errors and related issues, in keeping with the corporate. Because the toolmaker explains it, the entire course of resembles etching, albeit utilizing a unique instrument.

In contrast to lithography scanners, Centura Sculpta makes use of angled reactive ribbon beam to exactly sculpt the patterning supplies stack. As a result of the machine doesn’t use any photomasks, the fabric removing course of isn’t susceptible to alignment errors, which guarantees greater yields in contrast with utilization of EUV double patterning for interconnect strains and through pitches, in keeping with Utilized Supplies.

“The Sculpta system makes use of a singular angled reactive ribbon beam to sculpt the patterning supplies stack,” the corporate defined in a YouTube video. “Because the sidewalls are uncovered to the beam, chemically reactive species and radicals exactly take away patterning materials on the nanometer precision to boost the shapes. The wafer could be rotated in any course to create desired shapes with none further lithography steps.”

Process flow with and without pattern shaping.
Course of stream with and with out sample shaping (Supply: Utilized Supplies)
General benefits of using pattern shaping instead of another EUV exposure.
Normal advantages of utilizing sample shaping as a substitute of one other EUV publicity (Supply: Utilized Supplies)

The instrument makes use of current chemistry already used on the fab to take away supplies and elongate the shapes of trenches or vias, so it will possibly presumably be deployed pretty rapidly and with out necessity to rebuild a cleanroom. The corporate admits that its Centura Sculpta is a big machine, however it’s not as massive as an EUV scanner, so it ought to be appropriate with the overwhelming majority of current fabs.

Whereas EUV double patterning is dear, its utilization can cut back stochastic defects that EUV lithography is understood for. Though Centura Sculpta was designed to elongate strains throughout the X-axis, it will possibly repair sure stochastic defects by eradicating pointless materials, in keeping with Utilized Supplies.

But the system can’t naturally repair defects that emerge when materials is lacking. Moreover, Centura Sculpta is not going to exchange double-patterning EUV when forming steel pitches on important layers. For instance, the system can do nothing with dimensions of steel pitches and extra EUV LE loops they want.

Due to this fact, Centura Sculpta doesn’t exchange EUV double patterning utterly from manufacturing stream, however it reduces its utilization—thus saving time in addition to a whole lot of tens of millions of {dollars} in capital ($250 million per 100,000 wafer begins per 30 days), prices per wafer and environmental impression.

With a decreased variety of EUV exposures required, chipmakers can optimize utilization of pricey Twinscan NXE scanners and both cut back the variety of EUV instruments they want for required manufacturing capability or improve their manufacturing capability with out rising the variety of EUV scanners.

Centura Sculpta implementations

As a result of Utilized Supplies’ Centura Sculpta is a singular instrument, the corporate’s main logic prospects are at present learning the system, in keeping with the corporate. To this point, solely Intel has introduced plans to make use of the machine for its Intel 20-A fabrication course of in 2024–2025. TSMC declined to remark whether or not it’s testing the corporate’s pattern-shaping machine.

“As Moore’s Legislation drives us to ever-greater compute efficiency and density, sample shaping is proving to be an necessary new expertise that may assist cut back manufacturing price and course of complexity, [as well as] preserve power and assets,” stated Ryan Russell, company vice chairman for logic expertise growth at Intel. “Having collaborated carefully with Utilized Supplies within the optimization of Sculpta round our course of structure, Intel will likely be deploying pattern-shaping capabilities to assist us ship decreased design and manufacturing prices, course of cycle occasions and environmental impression.”

Talking of insertion of the corporate’s Centura Sculpta into the stream, it ought to be famous that it doesn’t require adjustments of design guidelines, in keeping with the corporate. In reality, it may even be used for current manufacturing applied sciences, however as a result of chipmakers have already got tools, they have to make chips now, so they aren’t going to make use of the brand new instrument for up to date manufacturing nodes.

“Modifications to design guidelines aren’t required,” stated Steven Sherman, managing director and common supervisor of the superior merchandise group of the semiconductor merchandise group at Utilized Supplies. “Sculpta is producing the identical patterns utilizing the identical design guidelines {that a} chipmaker would produce and use with out Sculpta. Sculpta is being bought for rising nodes that might require EUV double patterning however can use Sculpta to perform the identical outcomes at decrease fab capital price and per-wafer manufacturing price. That stated, the product may very well be used at current nodes, however that’s not the main target, as chipmakers have already purchased the tools for that manufacturing.”

The instrument can present a number of advantages past eradicating EUV double patterning for dense interconnect strains and vias, so its adoption will doubtless rely on how briskly chipmakers learn to use this all-new functionality.

For now, Centura Sculpta can obtain tip-to-tip spacing of 15–20 nm with out utilizing EUV double patterning, which is how Utilized Supplies’ prospects use the instrument right now (albeit not for high-volume manufacturing, however slightly for numerous experiments), in keeping with the corporate. But Utilized Supplies believes it will possibly get to 5- to 10-nm tip-to-tip dimension over time when such decision is required, maybe with high-numerical–aperture (NA) EUV insertion a number of years down the street.

ASML, the one maker of EUV scanners, welcomed the Centura Sculpta system however stated that ASML, in addition to chipmakers, should be taught all its advantages and the way to higher use it.

“We hope it may be a further instrument to additional enhance EUV-based patterning,” stated Sander Horman, a spokesman for ASML. “Our understanding is that Utilized Supplies expects the expertise to be obtainable for high-volume manufacturing inside two years. Our perception is that this time have to be used to validate that the expertise can enhance patterning for a number of the shapes talked about by Utilized, with none aspect impression on all the opposite shapes composing a full die. We should additionally perceive the applicability to extremely irregular constructions—which might be typical for logic—and to uniformity over the wafer. Within the coming months, we are going to work each time wanted with prospects to see what profit it brings.”

Two methods of shrinking

To realize transistor density documented for his or her newest course of applied sciences, chipmakers should print options with sure dimensions of fin pitches, contact gate pitches, minimal steel pitches and dense interconnect tip-to-tip house pitches. Chipmakers are likely to promote minimal sizes of M0 steel pitches, however tiny tip-to-tip areas are equally necessary.

“Tip-to-tip dimensions are necessary as a result of the tighter your tip-to-tip dimension is, the tighter you may sample your vias and the vents, and in the end the tighter you may pack your units beneath the interconnects,” Sherman stated.

Pitch-scaling roadmap by Applied Materials.
Pitch-scaling roadmap by Utilized Supplies (Supply: Utilized Supplies)

Modern EUV scanners, equivalent to ASML’s Twinscan NXE:3400C with 0.33 NA optics, provide an achievable important dimension of roughly 13–16 nm for high-volume manufacturing—a decision that’s adequate to print a 26-nm minimal steel pitch, in addition to an approximate 25- to 30-nm tip-to-tip interconnect house pitch with a single publicity patterning. This permits chipmakers to make use of current manufacturing instruments for 7-nm/6-nm (circa 36- to 38-nm steel pitches) in addition to 5-nm/4-nm (about 30- to 32-nm pitches) manufacturing nodes counting on single publicity patterning.

Whereas chipmakers are likely to shrink steel pitches aggressively, they don’t apply a lot consideration to interconnect tip-to-tip areas and generally even sacrifice them, in keeping with Utilized Supplies. These days, steel pitches are so tiny and interconnect pitches are so dense that chip designers and masks outlets should cut up high-density patterns in half and use two photomasks and two EUV exposures to adjust to the decision limits of EUV scanners.

“For a line-space sample of a few 32-nm pitch, the tightest tip-to-tip house you can sample with a single masks is about 25 to 30 nm,” Sherman stated. “However the tip-to-tip that designers actually need and want for right now’s tightest important layers is nearer to fifteen to twenty nm, and for that, you could use double patterning.”

An example of EUV double patterning for interconnect lines.
An instance of EUV double patterning for interconnect strains (Supply: Utilized Supplies)
An example of EUV double patterning for vias.
An instance of EUV double patterning for vias (Supply: Utilized Supplies)

Over time, issues will doubtless get tougher. At 3 nm, steel pitches will shrink to about 21–24 nm, and at 2 nm, they’re anticipated to be in a variety of 18–21 nm, in keeping with an ASML presentation that cites imec. Interconnect strains and vias pitches must get denser, too, which implies utilization of double patterning.

“[Chipmakers are] doing the whole lot they’ll and play every kind of lithography methods to optimize decision within the Y course solely to get the tightest metal-pitch line-space sample they probably can,” Sherman stated. “In order you play these lithography methods within the scanner and allow tighter and tighter steel pitches, you truly sacrifice decision within the different course—within the X course. As we shrink to tighter and tighter metal-pitch line areas, the tip-to-tip spacing that we will sample will get worse.”

Logic-scaling roadmap outlined by imec and presented by ASML.
Logic-scaling roadmap outlined by imec and introduced by ASML (Supply: ASML)

To make chips utilizing a 3-nm–class fabrication course of, chipmakers should both use double patterning with 0.33 NA EUV instruments or undertake next-generation high-NA EUV instruments with 0.55 NA optics that promise to allow a decision of about 8 nm. However whereas 3-nm–class nodes are already utilized by TSMC and Samsung Foundry for high-volume manufacturing, high-NA instruments are no less than a few years away.

Because of this, chipmakers should use double patterning with EUV for his or her newest nodes to make steel pitches smaller and shrink tip-to-tip spacing to allow additional scaling of efficiency, energy and space (PPA).

An example of an EUV double-patterning process flow.
An instance of an EUV double-patterning course of stream (Supply: Utilized Supplies)

A double-patterning EUV strategy brings up an entire slew of recent challenges, which incorporates added prices and a lengthened product cycle that’s already 4,000 steps long. Utilized Supplies says that along with yet one more EUV lithography step (which prices $70 per wafer per layer) and a further photomask (reticle), EUV double patterning provides chemical-vapor–resist movie deposition, chemical mechanical cleansing (chemical oxidation and mechanical abrasion), photoresist deposition and removing, an eBeam metrology (to regulate the wafer and the second masks), patterning movie etching and wafer cleansing. Further steps imply further wear-out for tools, which interprets into further capital expenditures. Primarily, to maintain PPA scaling, chipmakers should sacrifice prices and time.

“You all the time must deposit patterning movies and photoresist—there’s all the time metrology related [with] it,” Sherman stated. “With every lithography step, you all the time have an etch step and a few cleans. The multi EUV is efficient at getting the scale you need on the wafer, however there are undesirable penalties. … Any alignment errors that stay after lithography and get etched onto the wafer will result in efficiency issues and energy points. If the alignment is absolutely dangerous, it would find yourself being yield.”

Undocumented characteristic: preventing stochastics

Whereas initially designed to interchange utilization of EUV double patterning, Utilized Supplies’ Centura Sculpta can do different issues, too.

EUV is understood for the so-called stochastic effects brought on by sparse EUV photon-absorption density in EUV resists. Stochastic results lead to defects like random bridge defects or poor line-edge roughness, amongst different issues. Such defects are random by nature and are onerous to search out, begging the necessity for superior inspection instruments. Whereas there are makes an attempt to foretell defects, they can’t be eradicated utterly.

Four major stochastic effects and their percentage of EPE error budget.
4 main stochastic results and their proportion of EPE error funds (Supply: Fractilia)

ASML and different corporations within the semiconductor manufacturing ecosystem have devoted effort and time to enhance resists, masks and etch applied sciences to deal with stochastics.

“Over the previous couple of years, we’ve labored with many companions on resist, masks and etch applied sciences for EUV,” ASML’s Horman stated. “Improved resist sensitivity, imaging distinction, and many others., have all resulted in important features in productiveness or imaging efficiency.”

To a point, double patterning can clear up these issues, equivalent to when a high-density sample is cut up in two. Every masks doesn’t have to make use of the smallest options attainable and EUV scanners should not have to attain their lowest decision, which reduces stochastics. Furthermore, as resists get higher, fewer stochastic defects emerge.

“Double patterning is used each time sample options are lower than the decision functionality of the publicity instrument/resist,” stated Bruce Fienberg, a spokesperson for Intel. “Managing stochastic variation is a part of how selections are made on the necessity to cut up the layers with further EUV exposures to make sure a high-yield manufacturable course of. In order scaling progresses and the density of options will increase, there’s a better sensitivity over time to defects per unit space.”

Fienberg confirmed that utilization of pattern-shaping methods like Centura Sculpta can cut back the variety of stochastic defects considerably even in contrast with EUV double patterning however didn’t elaborate.

Moreover, steel pitches will shrink and interconnections will get denser with 2-nm–class applied sciences (that is when Intel begins utilizing Centura Sculpta), so fabs will maintain utilizing EUV double patterning.

“One strategy to double patterning permits the pitch to be relaxed, leading to fewer stochastic defects,” stated Chris Mack, CTO of Fractilia, an organization specializing in stochastics management. “However the stress for scanner productiveness with double patterning will likely be immense, probably forcing fabs to decrease the publicity dose to such ranges that stochastic defects improve.”

As a result of Centura Sculpta is designed to interchange EUV double patterning and the way in which it really works doesn’t create any stochastic defects, it reduces the variety of stochastic defects on the wafer.

“We’re going to principally take away supplies, so the little protrusions you may get out the aspect wall, we may take away these, successfully enhancing line-edge roughness,” Sherman stated. “It’s one other utility that our prospects are very occupied with. We’re working with them, and I might say it’s in growth. We’re not prepared to say that we will truly understand the profit in excessive quantity, however it’s an energetic space of growth.”

Certainly, Centura Sculpta is a brand-new instrument that’s at present solely positioned to take away an EUV litho-etch course of loop when forming dense interconnect and through pitches. All its different advantages are undocumented and could also be years away.

“Utilized Supplies has pushed this expertise as a method to keep away from a number of EUV double-patterning steps, however that’s solely the advertising place that they selected to emphasise,” Mack stated. “It’s attainable that EUV double patterning won’t ever occur with or with out Centura Sculpta. It is usually attainable that Centura Sculpta may very well be used simply to make EUV single patterning higher, enabling, for instance, a 3-nm node shrink within the tip-to-tip spacing on the similar pitch. This may very well be fairly priceless if it ends in each greater yield and smaller die dimension. This represents Utilized’s largest problem—how briskly can Centura Sculpta get built-in into the stream? If it requires new design rule, then when can an organization like TSMC provide it to their prospects?”